Abstract

A manufacturing method for a resistor integrated with a transistor having metal gate includes providing a substrate having a transistor region and a resistor region defined thereon, respectively forming a transistor having a dummy gate in the transistor region and a resistor in the resistor region, removing the dummy gate and portions of the resistor …

Legal parties

Party
Inventors (applicants): Shih-Chieh Hsu, Chi-Horn Pai, Yao-Chang Wang, Chi-Sheng Tseng, Chun-Hsien Lin, Jie-Ning Yang
Assignees (initial): United Microelectronics Corp. (Science-Based Industrial Park, Hsin-Chu, TW)
Agents: Scott Margo (attorney), Winston Hsu (attorney)

The application was examined by Kyung Lee (USPTO dept. 2833)

Claims

  • 1. A manufacturing method for a resistor integrated with a transistor having metal gate, comprising …
  • 2. The manufacturing method for a resistor integrated with a transistor having metal gate according …
  • 3. The manufacturing method for a resistor integrated with a transistor having metal gate according …

Cited documents

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Brief Description of the Drawings

FIGS. 1-8 are schematic drawings illustrating a manufacturing method for a resistor integrated with a transistor having metal gate provided by a preferred embodiment of the present invention, wherein FIG. …

Description

Background of the Invention

1. Field of the Invention The invention relates to a resistor and a manufacturing method thereof, and more particularly, to a resistor and a manufacturing method for a resistor integrated …

Detailed Description

Please refer to FIGS. 1-8 , which are schematic drawings illustrating a manufacturing method for a resistor integrated with a transistor having metal gate provided by a preferred embodiment of the present …

More details about Resistor and Manufacturing Method Thereof

Miscellaneous patent data

The patent was granted on Jul. 2, 2013, assigned to a foreign company or corporation, numbered 13/220,721 (application), the invention details are shown in 8 figures, the exemplary patent drawings are schematic drawings illustrating a manufacturing, Schematic drawing in a step, Schematic drawing in a step, Resistor and Manufacturing Method Thereof, the term of the patent grant was extended by 29 days, particularly claims a manufacturing method for a resistor integrated with a transistor having metal…, the known applicant's name is Lin Chun-Hsien, similar documents are classified under Hall effect, Cooling, heating, or ventilating arrangements, Metal casing or housing cast around element, Cooling Gas or Liquid Circulation, Resistance Value Responsive to a Condition, Non-adjustable resistors consisting of loose powdered or granular conducting, or powdered or granular semi-conducting material, the terminals or tapping points being welded or soldered, Heat-Storing, specified mathematical relationship between movement of resistor actuating means and value of resistance, other than direct proportional relationship, changing surface pressure between resistive masses or resistive and conductive masses, e.g. pile type, the agent's name is Scott Margo, an application examiner - Kyung Lee (2833 USPTO department), the grant number is 08477006, the invention is titled Resistor and Manufacturing Method Thereof, located in Science-Based Industrial Park, Hsin-Chu (TW), the assignee organization is United Microelectronics Corp., the invention description is illustrated by 8 drawings, developed by Chi-Horn Pai et al., the primary classification Resistance element and base formed in layers has been designated to the document, the known inventor's name is Yang Jie-Ning, the claim number 1 is selected as exemplary, the protection scope is defined by 15 claims, the application publication date is Aug. 30, 2011.

Invention classification information

The invention is classified under Insulated electrode device is combined with diverse type device, the base extending along, and imparting rigidity or reinforcement to, the resistive element, Resistance element and base formed in layers, In imaging array, Possessing plural conductive layers. The designated search classifications include Resistance element and base formed in layers.

Patent details
Publication number 08477006
Publication date Jul. 2, 2013
Kind code B2
Application number 13/220,721
Application date Aug. 30, 2011
Application type U
Application series code 13
Extension term 29
National classification 338/314
Total number of claims 15
Exemplary claims 1
Number of drawings 8
Number of figures 8
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