Abstract

A gate-on array shift register includes a signal-input unit, a control transistor and at least three stable modules. The signal-input unit receives and outputs a previous-stage output signal. The control terminal of the control transistor is electrically coupled to the signal-input unit for receiving the previous-stage output signal. The control transistor outputs corresponding output signal …

Legal parties

Party
Inventors (applicants): Po-Kai Wang, Chun-Hao Huang, Chung-Hung Peng
Assignees (initial): AU Optronics Corp. (Hsinchu, TW)
Agents: WPAT, PC (attorney), Justin King (attorney)

The application was examined by Tuan T Lam (USPTO dept. 2816)

Claims

  • 1. A gate-on array shift register, comprising: …
  • 2. The gate-on array shift register according to claim 1 , wherein the signal input …
  • 3. The gate-on array shift register according to claim 1 , wherein each of the stable …

International priority data

TW: 99134861 A / Oct. 13, 2010 (national)

Cited documents

Patents

  • Su et al. US 2012/0169581 A1 / 345/100, Jul. 1, 2012
  • Lin et al. US 2011/0142192 A1 / 377/77, Jun. 1, 2011
  • Yang et al. US 2012/0140871 A1 / 377/79, Jun. 1, 2012
  • Tsai et al. US 2010/0260312 A1 / 377/79, Oct. 1, 2010
  • Tsai et al. US 7688934 B2 / 377/64, Mar. 1, 2010
  • Huq US 5859630 A, Jan. 1, 1999
  • Chien et al. US 2010/0328293 A1 / 345/211, Dec. 1, 2010
  • Chen et al. US 7852976 B2, Dec. 1, 2010
  • Yang et al. US 2012/0155604 A1 / 377/79, Jun. 1, 2012
  • Tsai et al. US 2011/0007863 A1 / 377/79, Jan. 1, 2011
  • Chien et al. US 2007/0237285 A1 / 377/64, Oct. 1, 2007
  • Tsai et al. US 7953201 B2 / 377/64, May. 1, 2011

Drawings

Brief Description of the Drawings

FIG. 1 is block diagram of a part circuit of a gate-on array shift register, according to an embodiment. FIG. 2 is a block diagram of a gate-on array shift …

Description

Technical Field

The disclosure relates to gate-on array shift registers, and more particularly to a gate-on array shift register with at least three stable …

Detailed Description of Embodiments

The disclosure will now be described more specifically with reference to the following embodiments. It is to be noted that the following descriptions of embodiments are presented herein for purpose …

More details about Gate-On Array Shift Register

Miscellaneous patent data

The recorded agent's company name - WPAT, PC, the published inventor's name is Huang Chun-Hao, the application number is 13/241,590 (U.S.), similar patents are classified under Response verification devices, Arrangements for selecting an address in a digital store, using elements in which the storage effect is based on magnetic spin effect, Protection of memory contents, Detection of errors in memory contents, using opto-electronic devices, i.e. light-emitting and photoelectric devices electrically- or optically-coupled, Counting animate or inanimate entities, Counting or Dividing in Incremental Steps, programmable counter, Particular input or output means, Complementing a count, the patent particularly claims a gate-on array shift register, comprising…, the grant publication date is Aug. 6, 2013, the invention is named Gate-On Array Shift Register, the protection scope is defined by 6 claims, the grant number is 08503601 (publication number), the assignee organization is AU Optronics Corp., located in Hsinchu (TW), explained by 8 figures, the exemplary patent drawings are block diagram of a part, Circuit diagram of a signal, Block diagram of a gate-on, Gate-On Array Shift Register, the claim 1 is exemplary as chosen by the examiner, the application publication date is Sep. 23, 2011, the assignee classification - a foreign company or corporation, categorized under Shift Register as a primary classification, the invention description is illustrated by 6 drawings, was examined by Tuan T Lam, the main examiner (2816 USPTO department), the patent grant was extended by 10 days, the recorded applicant's name is Peng Chung-Hung, invented by Chung-Hung Peng et al.

Invention classification information

The invention is classified under Shift Register, Phase clocking or synchronizing, Field-effect transistor, Digital stores in which the information is moved stepwise, e.g. shift registers.

Patent details
Publication number 08503601
Publication date Aug. 6, 2013
Kind code B2
Application number 13/241,590
Application date Sep. 23, 2011
Application type U
Application series code 13
Extension term 10
National classification 377/64
Total number of claims 6
Exemplary claims 1
Number of drawings 6
Number of figures 8
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