Featured patents

Processor for Performing Operations With Two Wide Operands
US 08812821 B2, Aug. 19, 2014, Architecture Based Instruction Processing, Craig Hansen et al. / MicroUnity Systems Engineering, Inc. (Santa Clara, US)
A processor comprising:…

Debugging of a Data Processing Apparatus
US 08874883 B2, Oct. 28, 2014, Specialized instruction processing in support of testing, debugging, emulation, Michael John Williams et al. / ARM Limited (Cambridge, GB)
A data processing apparatus comprising:…

On-The-Fly Permutation of Vector Elements for Executing Successive Elemental Instructions
US 08868885 B2, Oct. 21, 2014, Vector processor operation, Michael Boukaya et al. / Ceva D.S.P. Ltd. (Herzlia Pituach, IL)
A method comprising:…

Compiler-Directed Sign/Zero Extension of a First Bit Size Result to Overwrite Incorrect Data Before Subsequent Processing Involving the Result Within an Architecture Supporting Larger Second Bit Size Values
US 08874882 B1, Oct. 28, 2014, Instruction modification based on condition, Ronny Ronen et al. / Intel Corporation (Santa Clara, US)
A method comprising:…

RISC Processor With Instruction Executing on Different Size Operand and Prefix Instruction Identifying Select Flag Update for Respective Size
US 08762689 B2, June 24, 2014, Decoding instruction to accommodate variable length instruction or operand, Fumio Arakawa / Renesas Electronics Corporation (Kawasaki-shi, JP)
A data processor of Reduced Instruction Set Computer type, comprising:…

Postponing Processing of Received Commands of Pre-Determined Type Until Amount of Associated Data Received and Aggregated Exceeds Threshold to Save Power
US 08627045 B2, Jan. 7, 2014, Processing Control, Kazumoto Shinoda / Fuji Xerox Co., Ltd. (Tokyo, JP)
A data processing device comprising:…

Runtime Extraction of Data Parallelism
US 08572359 B2, Oct. 29, 2013, Loop execution, Mark R. Nutter et al. / International Business Machines Corporation (Armonk, US)
A computer program product comprising a computer readable storage medium having…

Cache Memory Apparatus Having Internal ALU
US 08504808 B2, Aug. 6, 2013, Mode switch or change, Daniel Shane O'Sullivan / Mmagix Technology Limited (Douglas, GB)
A cache memory apparatus comprising:…

Multithread Handling
US 08478971 B1, July 2, 2013, Context preserving (e.g., context swapping, checkpointing, register windowing, Yu-Chi Chuang et al. / Marvell International Ltd. (Hamilton, BM)
A multi-thread processing unit comprising:…

Cascaded Accelerator Functions
US 08478965 B2, July 2, 2013, Multimode, Thomas A. Gregg et al. / International Business Machines Corporation (Armonk, US)
A computer program product for facilitating processing within a computing…

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