Featured patents

Dynamically Determining the Profitability of Direct Fetching in a Multicore Architecture
US 08832414 B2, Sept. 9, 2014, Instruction Fetching, Yan Solihin / Empire Technology Development LLC (Wilmington, US)
A method to determine a profitability of direct fetching in a multicore…

Processor Testing
US 08812826 B2, Aug. 19, 2014, Conditional branching, Brad L. Herold et al. / International Business Machines Corporation (Armonk, US)
A system comprising:…

Combined Level 1 and Level 2 Branch Predictor
US 08788797 B2, July 22, 2014, Branch prediction, Trivikram Krishnamurthy et al. / Advanced Micro Devices, Inc. (Sunnyvale, US)
A branch predictor for use in a processor, comprising:…

Data Processing Apparatus and Method for Converting Data Values Between Endian Formats
US 08769251 B2, July 1, 2014, Byte-Word Rearranging, Bit-Field Insertion or Extraction, String Length Detecting, or Sequence Detecting, Nicolas Chaussade et al. / ARM Limited (Cambridge, GB)
A data processing apparatus comprising:…

System for Efficiently Tracing Data in a Data Processing System
US 08677104 B2, March 18, 2014, Specialized instruction processing in support of testing, debugging, emulation, Paul Anthony Gilkerson et al. / ARM Limited (Cambridge, GB)
A trace unit configured to generate items of trace data indicative of processing…

Systems and Method for Managing Divergent Threads in a SIMD Architecture
US 08667256 B1, March 4, 2014, Context preserving (e.g., context swapping, checkpointing, register windowing, Brett W. Coon et al. / NVIDIA Corporation (Santa Clara, US)
A computer-implemented method for managing divergent threads in a thread group…

Branch Prediction Apparatus of Computer Storing Plural Branch Destination Addresses
US 08578140 B2, Nov. 5, 2013, Branch prediction, Megumi Yokoi / Fujitsu Limited (Kawasaki, JP)
A branch prediction apparatus of a processor, comprising:…

Elastic Shared RAM Array Including Contiguous Instruction and Data Portions Distinct From Each Other
US 08533439 B2, Sept. 10, 2013, Specialized instruction processing in support of testing, debugging, emulation, Rocendo Bracamontes / Atmel Corporation (San Jose, US)
A microcontroller comprising:…

Pipeline Replay Support for Multicycle Operations
US 08516224 B2, Aug. 20, 2013, Long instruction word, Godfrey D'Souza et al.
A non-transitory computer-readable storage device comprising computer-executable…

System and Method for Limiting the Impact of Stragglers in Large-Scale Parallel Data Processing
US 08510538 B1, Aug. 13, 2013, Processing control for data transfer, Joshua Louis Levenberg et al. / Google Inc. (Mountain View, US)
A method of performing a large-scale data processing job, comprising:…

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