Featured patents

Circuit and Method for Multiplying a Signed Value by a Constant
US 08843541 B1, Sept. 23, 2014, Multiplication followed by addition, Gordon I. Old / Xilinx, Inc. (San Jose, US)
A multiplier circuit for multiplying a signed value by a constant, comprising:…

Signal Processing Device
US 08799342 B2, Aug. 5, 2014, Correlation, Yuji Hasegawa et al. / Honda Motor Co., Ltd. (Tokyo, JP)
A signal processing device comprising:…

Method and Controller for Processing Data Multiplication in RAID System
US 08782113 B2, July 15, 2014, Galois field, Ching-Hao Chou et al. / Infortrend Technology, Inc. (Taipei Hsien, TW)
A method for processing data multiplication in a physical storage device (PSD)…

Approximate Order Statistics of Real Numbers in Generic Data
US 08745109 B2, June 3, 2014, Particular function performed, Steve Yu Zhang / Splunk Inc. (San Francisco, US)
A method for calculating approximate order statistics from a collection…

Spectral Modular Arithmetic Method and Apparatus
US 08719324 B1, May 6, 2014, Residue number, Gokay Saldamli et al.
A method of modular exponentiation, compromising:…

IFFT Processing in Wireless Communications
US 08612504 B2, Dec. 17, 2013, Fast Fourier Transform, Durk L. Van Veen et al. / QUALCOMM Incorporated (San Diego, US)
A processing system, comprising:…

Extended-Precision Integer Arithmetic and Logical Instructions
US 08615541 B2, Dec. 24, 2013, Floating point, Richard Craig Johnson et al. / NVIDIA Corporation (Santa Clara, US)
A computer-implemented method for performing an extended precision operation,…

Waveform Generator With a Register That Shifts and Provides Groups of Successive Data Values From an Input Data Stream
US 08572143 B2, Oct. 29, 2013, Function generation, Thomas Dippon et al. / Agilent Technologies, Inc. (Santa Clara, US)
A method of generating an output signal, the method comprising:…

Modified Gram-Schmidt Core Implemented in a Single Field Programmable Gate Array Architecture
US 08543633 B2, Sept. 24, 2013, Matrix array, Luke A. Miller / Lockheed Martin Corporation (Bethesda, US)
A processor for performing a QR decomposition (QRD) according to a modified…

Total Order Comparator Unit for Comparing Values of Two Floating Point Operands
US 08543631 B2, Sept. 24, 2013, Floating point, Guy L. Steele, Jr. / Oracle America, Inc. (Redwood City, US)
A floating point total order comparator circuit for comparing a first floating…

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