Featured patents

Apparatus and Method for Generating Small-Size Spread Spectrum Clock Signal
US 08509373 B2, Aug. 13, 2013, Ha-Jun Jeon et al. / Dongbu HiTek Co., Ltd. (Seoul, KR)
An apparatus comprising:…

Apparatus and Method for Providing Digital Representation of Time Difference Between Clocks
US 08494105 B1, July 23, 2013, Jeffery Patterson / Agilent Technologies, Inc. (Santa Clara, US)
An apparatus for providing a digital representation of a time difference between…

Burst Phase Detection for Phase Cyclic Data Streams
US 08681919 B1, March 25, 2014, Paolo Novellini / Xilinx, Inc. (San Jose, US)
A phase detection system, the system comprising:…

CDR With Digitally Controlled Lock to Reference
US 08687756 B2, April 1, 2014, Jeffrey S. Kueng et al. / LSI Corporation (Milpitas, US)
Apparatus for controlling an oscillation frequency and phase in a receiver during…

Circuit and Method for Receiving Serial Data and Serial Data Transmission System and Method Using the Same
US 08483345 B2, July 9, 2013, Saito Shinichi / Rohm Co., Ltd. JP
A receiving circuit which receives serial data, comprising:…

Clock and Data Recovery (CDR) Architecture and Phase Detector Thereof
US 08457269 B2, June 4, 2013, Chung-Ming Huang et al. / NCKU Research and Development Foundation (Tainan, TW)
A clock and data recovery (CDR) architecture, comprising:…

Clock and Data Recovery (CDR) Using Phase Interpolation
US 08718217 B2, May 6, 2014, William W. Walker et al. / Fujitsu Limited (Kawasaki-shi, JP)
A circuit comprising:…

Clock Data Recovery Circuit
US 08787515 B2, July 22, 2014, An-Chung Chen / Phison Electronics Corp. (Miaoli, TW)
A clock and data recovery circuit, comprising:…

Clock Generating Circuit, Transceiver and Related Method
US 08675801 B2, March 18, 2014, Chin-Hsien Yen / Silicon Motion Inc. (Tianan Digital City, Futian, Shenzhen, Guangdong, CN)
A clock generating circuit, comprising:…

Clock Generation Devices and Methods
US 08619938 B2, Dec. 31, 2013, Chuan Liu et al. / Mediatek Inc. (Hsin-Chu, TW)
A clock generation device provided for a transmitter, wherein the transmitter…

Clock Generators and Clock Generation Methods Thereof
US 08644441 B2, Feb. 4, 2014, Bo-Jiun Chen et al. / Mediatek Inc. (Hsin-Chu, TW)
A clock generator, comprising:…

Clock Recovery
US 08472580 B2, June 25, 2013, Eugenia Carr Cordero Crespo et al. / Texas Instruments Incorporated (Dallas, US)
A data receiver comprising:…

Clock Reproducing and Timing Method in a System Having a Plurality of Devices
US 08781053 B2, July 15, 2014, Peter Gillingham et al. / Conversant Intellectual Property Management Incorporated (Ottawa, Ontario, CA)
A system comprising a plurality of devices that are series-connected…

Clock Synchroniser
US 08537957 B2, Sept. 17, 2013, Paul Lesso / Wolfson Microelectronics plc (Edinburgh, GB)
A circuit for generating a first clock signal at a frequency determined by…

CMOS Interpolator for a Serializer/Deserializer Communication Application
US 08824616 B1, Sept. 2, 2014, Karthik S. Gopalakrishnan / Inphi Corporation (Santa Clara, US)
A integrated transceiver circuit device comprising:…

Communication Systems and Clock Generation Circuits Thereof With Reference Source Switching
US 08526559 B2, Sept. 3, 2013, Shiue-Shin Liu et al. / Mediatek Inc. (Hsin-Chu, TW)
A device communicating with a host, comprising:…

Communication Systems, Clock Generation Circuits Thereof, and Method for Generating Clock Signal
US 08451971 B2, May 28, 2013, Chuan Liu et al. / Mediatek Inc. (Hsin-Chu, TW)
A clock generation circuit for a transmitter, wherein the transmitter transmits…

Continuous-Rate Clock Recovery Circuit
US 08509371 B2, Aug. 13, 2013, John G. Kenney / Analog Devices, Inc. (Norwood, US)
A continuous-rate clock and data recovery circuit, the circuit comprising:…

Delay-Locked Loop With Dynamically Biased Charge Pump
US 08867685 B2, Oct. 21, 2014, Jaeha Kim et al. / True Circuits, Inc. (Los Altos, US)
A delay-locked loop, comprising:…

Digital Hold in a Phase-Locked Loop
US 08532243 B2, Sept. 10, 2013, Jerrell P. Hein et al. / Silicon Laboratories Inc. (Austin, US)
A method comprising:…

Digital Phase Locked Loop Circuitry and Methods
US 08462908 B2, June 11, 2013, Ramanand Venkata et al. / Altera Corporation (San Jose, US)
Apparatus for converting parallel data to serial data comprising:…

Electronic Device for Generating a Fractional Frequency
US 08571161 B2, Oct. 29, 2013, Salvatore Levantino et al. / Politechnico di Milano (Milan, IT)
An electronic device for generating a fractional synthesized frequency,…

Fractional Type Phase-Locked Loop Circuit With Compensation of Phase Errors
US 08699650 B2, April 15, 2014, Enrico Temporiti Milani et al. / ST-Ericsson SA (Plan-les-Ouates, CH)
A circuit for compensating for a phase error between first and second signals,…

Fractional-N Frequency Synthesizer With Separate Phase and Frequency Detectors
US 08537952 B1, Sept. 17, 2013, Himanshu Arora / Marvell International Ltd. (Hamilton, BM)
A method of generating a signal having a desired frequency from a reference…

Frequency and Phase Acquisition of a Clock and Data Recovery Circuit Without an External Reference Clock
US 08804892 B2, Aug. 12, 2014, Ian Kyles / Vitesse Semiconductor Corporation (Camarillo, US)
Referenceless clock and data recovery circuitry, comprising:…

Frequency Calibration Apparatus of Frequency Synthesizer and Frequency Calibration Method Thereof
US 08750448 B2, June 10, 2014, Hyun-su Chae et al. / Samsung Electronics Co., Ltd. (Suwon-si, KR)
A frequency calibration apparatus of a frequency synthesizer, the apparatus…

Frequency Synchronization Using Clock Recovery Loop With Adaptive Packet Filtering
US 08693608 B2, April 8, 2014, Ilija Hadzic et al. / Alcatel Lucent (Paris, FR)
An apparatus comprising:…

Handling Video Transition Errors in Video on Demand Streams
US 08837660 B2, Sept. 16, 2014, David P. Bogosh et al. / Broadcom Corporation (Irvine, US)
A method for receiving packets, said method comprising:…

Highly Flexible Fractional N Frequency Synthesizer
US 08477898 B2, July 2, 2013, Richard H. Steeves et al. / Synopsys, Inc. (Mountain View, US)
A phase-locked loop (PLL), comprising:…

Initialization Circuit for Delay Locked Loop
US 08503598 B2, Aug. 6, 2013, Tony Mai / MOSAID Technologies Incorporated (Ottawa, Ontario, CA)
A delay locked loop comprising:…

Patentorg has 55 documents under Phase Locked Loop Patents.

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