Featured patents

Clock Distribution Circuit and Method of Forming Clock Distribution Circuit
US 08736339 B2, May 27, 2014, With plural paths in network, Shigeo Kawaoka / Canon Kabushiki Kaisha (Tokyo, JP)
A clock distribution circuit in a semiconductor integrated circuit including…

Interpolative Divider Linearity Enhancement Techniques
US 08692599 B2, April 8, 2014, With digital element, Xue-Mei Gong et al. / Silicon Laboratories Inc. (Austin, US)
A method comprising:…

Layer-ID Detector for Multilayer 3D-IC and Method of the Same
US 08680909 B2, March 25, 2014, Clock or pulse waveform generating, Meng-Fan Chang et al. / National Tsing Hua University (Hsin Chu, TW)
A layer-ID detector for multilayer 3D-IC, comprising:…

Methods and Apparatus Related to an Improved Complementary MOSFET Switch
US 08624663 B2, Jan. 7, 2014, Field-effect transistor, Kenneth P Snowdon et al. / Fairchild Semiconductor Corporation (San Jose, US)
An apparatus, comprising:…

Level Shifter Circuit and Gate Driver Circuit Including the Same
US 08624655 B2, Jan. 7, 2014, Interstage coupling, Sung Man Pang / Samsung Electro-Mechanics Co., Ltd. (Suwon, KR)
A level shifter circuit, comprising:…

Downconverter, Downconverter IC, and Method for Controlling the Downconverter
US 08614594 B2, Dec. 24, 2013, Synthesizer, Yoshiaki Nakamura / Renesas Electronics Corporation (Kanagawa, JP)
A downconverter comprising:…

Double Edge Triggered Flip Flop
US 08542048 B2, Sept. 24, 2013, Master-slave bistable latch, Ravindraraj Ramaraju / Freescale Semiconductor, Inc. (Austin, US)
A dual edge triggered flip flop circuit, comprising:…

PLL Dual Edge Lock Detector
US 08519756 B2, Aug. 27, 2013, Phase lock loop, Shafiq M. Jamal et al. / Marvell World Trade Ltd. (St. Michael, BB)
A circuit configured to receive a reference signal and a target signal…

System and Method of Controlling Devices Operating Within Different Voltage Ranges
US 08502590 B2, Aug. 6, 2013, Interstage coupling, Thomas H. Friddell / The Boeing Company (Chicago, US)
A semiconductor device comprising:…

Architecture for Operating Resonant Clock Network in Conventional Mode
US 08502569 B2, Aug. 6, 2013, Current driver, Marios C. Papaefthymiou et al. / Cyclos Semiconductor, Inc. (Berkeley, US)
A clock driver comprising:…

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