Featured patents

Combination AC/DC Peak Detector and Signal Type Discriminator
US 08823417 B2, Sept. 2, 2014, Maximum or minimum amplitude, Lev Michael Barsky / Siemens Industry, Inc. (Alpharetta, US)
A device for detecting and discriminating a differential current, the device…

Signal Transmission Circuit, Integrated Circuit and Electric Device Including Thereof for Transmitting a Plurality of Signals Each Having Different Transmission Speed
US 08823438 B2, Sept. 2, 2014, Plural clock outputs with multiple inputs, Daiki Yanagishima et al. / Rohm Co., Ltd. (Kyoto, JP)
A signal transmission circuit for transmitting first and second input signals,…

Circuit for the Clocking of an FPGA
US 08797081 B2, Aug. 5, 2014, Clock or pulse waveform generating, Marc Schlachter et al. / Endress + Hauser GmbH + Co. KG (Maulburg, DE)
A circuit comprising:…

Frequency-Doubling Delay Locked Loop
US 08754687 B2, June 17, 2014, With variable delay means, Paul W. Demone / Conversant Intellectual Property Management Inc. (Ottawa, Ontario, CA)
An integrated circuit comprising:…

Multi-Step Charge Pump and Method for Producing Multi-Step Charge Pumping
US 08742832 B2, June 3, 2014, Charge pump details, Lan-Shan Cheng et al. / Novatek Microelectronics Corp. (Hsinchu, TW)
A multi-step charge pump, having a power input terminal and a power output…

Sampling Switch Circuit That Uses Correlated Level Shifting
US 08710896 B2, April 29, 2014, Interstage coupling, Steven P. Allen et al. / Freescale Semiconductor, Inc. (Austin, US)
A sampling switch circuit that uses correlated level shifting, the sampling…

Substrate Bias Feedback Scheme to Reduce Chip Leakage Power
US 08587365 B1, Nov. 19, 2013, Having particular substrate biasing, Vijay Kumar Srinivasa Raghavan et al. / Cypress Semiconductor Corporation (San Jose, US)
A method, comprising:…

Reference Frequency Generation Circuit, Semiconductor Integrated Circuit, and Electronic Device
US 08508269 B2, Aug. 13, 2013, With charge pump, Shiro Sakiyama et al. / Panasonic Corporation (Osaka, JP)
A reference frequency generation circuit which generates a reference clock,…

PLL Frequency Synthesizer
US 08513990 B2, Aug. 20, 2013, Phase lock loop, Seeichi Ozawa et al. / Thine Electronics, Inc. (Tokyo, JP)
A PLL frequency synthesizer comprising:…

Solid State Drive and Controlling Method Thereof
US 08525576 B2, Sept. 3, 2013, With compensation for temperature fluctuations, Jen-Yu Hsu et al. / Lite-On It Corporation (Taipei, TW)
A controlling method for a solid state drive, the solid state drive comprising…

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