Featured patents

Dynamic Impedance Control for Input/Output Buffers
US 08847623 B2, Sept. 30, 2014, Bus or line termination, Bruce Millar / Conversant Intellectual Property Management Inc. (Ottawa, CA)
A circuit comprising:…

Single Clock Distribution Network for Multi-Phase Clock Integrated Circuits
US 08847625 B2, Sept. 30, 2014, Clocking or Synchronizing of Logic Stages or Gates, Mitchell Aaron Thornton et al. / Southern Methodist University (Dallas, US)
A multi-valued logic circuit comprising:…

Low Leakage Spare Gates for Integrated Circuits
US 08810280 B2, Aug. 19, 2014, Field-effect transistor, Yongjun Zhang et al. / Oracle International Corporation (Redwood Shores, US)
A spare gate cell, comprising:…

Semiconductor Integrated Circuit, Programmable Logic Device, Method of Manufacturing Semiconductor Integrated Citcuit
US 08860459 B2, Oct. 14, 2014, Significant integrated structure, layout, or layout interconnections, Koichiro Zaitsu et al. / Kabushiki Kaisha Toshiba (Tokyo, JP)
A semiconductor integrated circuit comprising:…

Impedance Calibration Circuit, Semiconductor Memory Device With the Impedance Calibration Circuit and Layout Method of Internal Resistance in the Impedance Calibration Circuit
US 08773161 B2, July 8, 2014, Bus or line termination, In Jun Moon / Hynix Semiconductor Inc. (Kyoungki-do, KR)
A method of providing internal resistance in an impedance calibration circuit…

Semiconductor Integrated Circuit With Data Transmitting and Receiving Circuits
US 08552758 B2, Oct. 8, 2013, Signal Sensitivity or Transmission Integrity, Masayasu Komyo et al. / Renesas Electronics Corporation (Kanagawa, JP)
A semiconductor integrated circuit comprising:…

Self-Modulated Voltage Reference
US 08547135 B1, Oct. 1, 2013, Having details of setting or programming of interconnections or logic functions, Dave Van Ess et al. / Cypress Semiconductor Corporation (San Jose, US)
A circuit, comprising:…

Mitigating Side Effects of Impedance Transformation Circuits
US 08513973 B2, Aug. 20, 2013, Bias or power supply level stabilization, Dieter Draxelmayr / Infineon Technologies AG (Neubiberg, DE)
An apparatus comprising:…

System Level Interconnect With Programmable Switching
US 08476928 B1, July 2, 2013, Significant integrated structure, layout, or layout interconnections, Warren Snyder et al. / Cypress Semiconductor Corporation (San Jose, US)
An apparatus, comprising:…

Permutable Switching Network With Enhanced Interconnectivity for Multicasting Signals
US 08456192 B2, June 4, 2013, Significant integrated structure, layout, or layout interconnections, Peter M. Pani et al. / Advantage Logic, Inc. (Cupertino, US)
An integrated circuit, comprising: a L-level permutable switching network…

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