Featured patents

Integrated Circuit Package System With Stacked Die
US 08810019 B2, Aug. 19, 2014, Stacked arrangement, Junwoo Myung et al. / STATS ChipPAC Ltd. (Singapore, SG)
An integrated circuit package system comprising:…

Wiring Substrate and Semiconductor Package
US 08786099 B2, July 22, 2014, Via (interconnection hole) shape, Tomoharu Fujii / Shinko Electric Industries Co., Ltd. (Nagano-Shi, JP)
A wiring substrate comprising:…

Semiconductor Device and Method of Manufacturing the Same
US 08754475 B2, June 17, 2014, Active channel region has a graded dopant concentration decreasing with distance from source region, Masaki Yamada / Kabushiki Kaisha Toshiba (Tokyo, JP)
A semiconductor device, comprising:…

Semiconductor Devices, Methods of Manufacture Thereof and Articles Comprising the Same
US 08698226 B2, April 15, 2014, With irregularities on electrode to facilitate charging or discharging of floating electrode, Fotios Papadimitrakopoulos et al. / University of Connecticut (Farmington, US)
A device comprising:…

Twin MONOS Array for High Speed Application
US 08633544 B2, Jan. 21, 2014, With plural, separately connected, gate electrodes in same device, Yoshitaka Baba et al. / Halo LSI, Inc. (Hillsboro, US)
A twin MONOS metal bit array operation comprising:…

Semiconductor Chip, Stack-Type Semiconductor Package
US 08624241 B2, Jan. 7, 2014, Test or Calibration Structure, Tac Keun Oh / SK Hynix Inc. (Gyeonggi-do, KR)
A semiconductor chip comprising:…

Display Device With Metal Oxidel Layer and Method for Manufacturing the Same
US 08633479 B2, Jan. 21, 2014, Semiconductor Is an Oxide of a Metal or Copper Sulfide, Dae-Woo Lee et al. / Samsung Display Co., Ltd. (Yongin, Gyeonggi-Do, KR)
A display, comprising:…

Method of Fabricating Semiconductor Device and the Semiconductor Device
US 08592978 B2, Nov. 26, 2013, At least one layer forms a diffusion barrier, Koichi Matsuno et al. / Kabushiki Kaisha Toshiba (Tokyo, JP)
A semiconductor device comprising:…

Shielding Structure for Transmission Lines
US 08558355 B2, Oct. 15, 2013, With Shielding, Jeffrey T. Wall et al. / Altera Corporation (San Jose, US)
A shielding structure comprising:…

Non-Volatile Memory Cell With Asymmetrical Split Gate and Related System and Method
US 08502296 B1, Aug. 6, 2013, With additional contacted control electrode, Mark Rathmell et al. / National Semiconductor Corporation (Santa Clara, US)
A method comprising:…

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